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author | Niklas Neronin <niklas.neronin@linux.intel.com> | 2024-11-06 12:14:37 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-11-06 13:26:14 +0100 |
commit | e1b0fa863907a61e86acc19ce2d0633941907c8e (patch) | |
tree | f4e58d0d910ae0d05c4397b81806a3bf14cab5d7 /tools/perf/scripts/python/stackcollapse.py | |
parent | 3f970bd06c5295e742ef4f9cf7808a3cb74a6816 (diff) |
usb: xhci: remove option to change a default ring's TRB cycle bit
The TRB cycle bit indicates TRB ownership by the Host Controller (HC) or
Host Controller Driver (HCD). New rings are initialized with 'cycle_state'
equal to one, and all its TRBs' cycle bits are set to zero. When handling
ring expansion, set the source ring cycle bits to the same value as the
destination ring.
Move the cycle bit setting from xhci_segment_alloc() to xhci_link_rings(),
and remove the 'cycle_state' argument from xhci_initialize_ring_info().
The xhci_segment_alloc() function uses kzalloc_node() to allocate segments,
ensuring that all TRB cycle bits are initialized to zero.
Signed-off-by: Niklas Neronin <niklas.neronin@linux.intel.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Link: https://lore.kernel.org/r/20241106101459.775897-12-mathias.nyman@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions