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| author | Daniel Miess <Daniel.Miess@amd.com> | 2022-07-19 11:43:28 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-08-10 15:11:51 -0400 |
| commit | 9bd110ab06e93fd01938dedd8b6015940418f0fb (patch) | |
| tree | d5232356ef13dfe0c8cf2fa0c9ff85b117be150c /tools/perf/scripts/python/stackcollapse.py | |
| parent | 0cd34ce82b0a9ce503d35a51bff47ba3b6715557 (diff) | |
drm/amd/display: Fix TMDS 4K@60Hz YCbCr420 corruption issue
[Why]
DIG_FIFO_OUTPUT_PIXEL_MODE not being set for dcn314
resulting in incorrect timing for YCbCr4:2:0
[How]
Copy the implementation of set_pixels_per_cycle from dcn32
over to dcn314
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Daniel Miess <Daniel.Miess@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions