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| author | Maarten Lankhorst <dev@lankhorst.se> | 2025-06-19 12:49:03 +0200 |
|---|---|---|
| committer | Maarten Lankhorst <dev@lankhorst.se> | 2025-06-26 22:11:28 +0200 |
| commit | 2e1efcafd4fb61de987482d49a4e7b12395a3f25 (patch) | |
| tree | b63d4e511b7d360e0028e2a170c4fffda9d73b6c /tools/perf/scripts/python/net_dropmonitor.py | |
| parent | 396044c9d84d6668d89a5b680688b0d5fcae3aa5 (diff) | |
drm/xe: Make it possible to read instance0 MCR registers after xe_gt_mcr_init_early
After mcr_init_early, we need to be able to do VRAM and CCS probing
without hwconfig probe. Fortunately the relevant registers are all
instance 0, which fortunately means no dependencies on further initialization
is required.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250619104858.418440-17-dev@lankhorst.se
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Diffstat (limited to 'tools/perf/scripts/python/net_dropmonitor.py')
0 files changed, 0 insertions, 0 deletions