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author | Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> | 2021-09-29 10:54:42 +0530 |
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committer | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2021-09-29 16:25:57 +0200 |
commit | 11408ea52786c2ae802b4cae32597fffe440147e (patch) | |
tree | f97f88063f4b296880ca0624f36f6dc62431da22 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | dde98a573c0a00a1501f087f89ee61ce93d416df (diff) |
drm/i915/gen11: Disable cursor clock gating in HDR mode
Display underrun in HDR mode when cursor is enabled.
RTL fix will be implemented CLKGATE_DIS_PSL_A bit 28-46520h.
As per W/A 1604331009, Disable cursor clock gating in HDR mode.
Bspec : 33451
Changes since V6:
- Address checkpatch warnings
- Bit ordering
Changes since V5:
- replace intel_de_read with intel_de_rmw - Jani
Changes since V4:
- Added WA needed check - Ville
- Replace BIT with REG_BIT - Ville
- Add WA enable/disable support back which was
added in V1 - Ville
Changes since V3:
- Disable WA when not in HDR mode or cursor plane
not active - Ville
- Extract required args from crtc_state - Ville
- Create HDR mode API using bdw_set_pipemisc ref - Ville
- Tested with HDR video as well full setmode, WA
applies and disables
Changes since V2:
- Made it general gen11 WA
- Removed WA needed check
- Added cursor plane active check
- Once WA enable, software will not disable
Changes since V1:
- Modified way CLKGATE_DIS_PSL bit 28 was modified
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210929052442.2543054-1-tejaskumarx.surendrakumar.upadhyay@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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