From 135fdbc0f776fdf305abed3b16f0064a74c3f519 Mon Sep 17 00:00:00 2001
From: Damien Zammit <damien@zamaudio.com>
Date: Sat, 12 Jul 2025 14:41:35 +0200
Subject: ioapic: Add conditional TMR bit in EOI (no-op)

This code may be needed in the future, so add it in now
but keep it disabled.  The special EOI handling for
interrupts may only need to be done for one kind of trigger mode.
---
 i386/i386at/ioapic.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

(limited to 'i386')

diff --git a/i386/i386at/ioapic.c b/i386/i386at/ioapic.c
index abeab3ab..a6c0fd6a 100644
--- a/i386/i386at/ioapic.c
+++ b/i386/i386at/ioapic.c
@@ -290,6 +290,17 @@ ioapic_toggle(int pin, int mask)
     ioapic_toggle_entry(apic, pin, mask);
 }
 
+#if 0
+static int
+lapic_tmr_bit(uint8_t vec)
+{
+    int i;
+
+    i = (vec & ~0x1f) >> 5;
+    return lapic->tmr[i].r & (1 << (vec & 0x1f));
+}
+#endif
+
 void
 ioapic_irq_eoi(int pin)
 {
@@ -303,6 +314,7 @@ ioapic_irq_eoi(int pin)
     spl_t s = simple_lock_irq(&ioapic_lock);
 
     if (!has_irq_specific_eoi) {
+      // XXX Linux conditions on TMR bit: if (!lapic_tmr_bit(entry.both.vector)) {
         /* Workaround for old IOAPICs with no specific EOI */
 
         /* Mask the pin and change to edge triggered */
@@ -314,9 +326,9 @@ ioapic_irq_eoi(int pin)
 
         /* Restore level entry */
         ioapic_write_entry(apic, pin, oldentry.both);
+      //}
     } else {
         volatile ApicIoUnit *ioapic = apic_get_ioapic(apic)->ioapic;
-
         ioapic_read_entry(apic, pin, &entry.both);
         ioapic->eoi.r = entry.both.vector;
     }
-- 
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