diff options
| author | Thomas Schwinge <thomas@codesourcery.com> | 2013-05-23 23:37:00 +0200 |
|---|---|---|
| committer | Thomas Schwinge <thomas@codesourcery.com> | 2013-05-23 23:37:00 +0200 |
| commit | f9e888643115b4b2f28853ebd1733f4410fb8839 (patch) | |
| tree | 58c69f6cef623679080e8933b6c79880bfbd7cb8 /sysdeps/unix/sysv/linux/s390/s390-64/setcontext.S | |
| parent | d78eef6ebc008f784f501ce208bef12c6eafda27 (diff) | |
| parent | b934acf0e93c5a220551ed6e686bb9d45a24a8cc (diff) | |
Merge branch 'baseline' into refs/top-bases/tschwinge/Roger_Whittaker
Diffstat (limited to 'sysdeps/unix/sysv/linux/s390/s390-64/setcontext.S')
| -rw-r--r-- | sysdeps/unix/sysv/linux/s390/s390-64/setcontext.S | 43 |
1 files changed, 22 insertions, 21 deletions
diff --git a/sysdeps/unix/sysv/linux/s390/s390-64/setcontext.S b/sysdeps/unix/sysv/linux/s390/s390-64/setcontext.S index 7415bd9384..8157327bf4 100644 --- a/sysdeps/unix/sysv/linux/s390/s390-64/setcontext.S +++ b/sysdeps/unix/sysv/linux/s390/s390-64/setcontext.S @@ -31,38 +31,39 @@ other than the PRESERVED state. */ ENTRY(__setcontext) - lgr %r5,%r2 + lgr %r1,%r2 /* sigprocmask (SIG_SETMASK, &sc->sc_mask, NULL). */ la %r2,SIG_BLOCK - la %r3,SC_MASK(%r5) + la %r3,SC_MASK(%r1) slgr %r4,%r4 + lghi %r5,_NSIG8 svc SYS_ify(rt_sigprocmask) /* Load fpu context. */ - lfpc SC_FPC(%r5) - ld %f0,SC_FPRS(%r5) - ld %f1,SC_FPRS+8(%r5) - ld %f2,SC_FPRS+16(%r5) - ld %f3,SC_FPRS+24(%r5) - ld %f4,SC_FPRS+32(%r5) - ld %f5,SC_FPRS+40(%r5) - ld %f6,SC_FPRS+48(%r5) - ld %f7,SC_FPRS+56(%r5) - ld %f8,SC_FPRS+64(%r5) - ld %f9,SC_FPRS+72(%r5) - ld %f10,SC_FPRS+80(%r5) - ld %f11,SC_FPRS+88(%r5) - ld %f12,SC_FPRS+96(%r5) - ld %f13,SC_FPRS+104(%r5) - ld %f14,SC_FPRS+112(%r5) - ld %f15,SC_FPRS+120(%r5) + lfpc SC_FPC(%r1) + ld %f0,SC_FPRS(%r1) + ld %f1,SC_FPRS+8(%r1) + ld %f2,SC_FPRS+16(%r1) + ld %f3,SC_FPRS+24(%r1) + ld %f4,SC_FPRS+32(%r1) + ld %f5,SC_FPRS+40(%r1) + ld %f6,SC_FPRS+48(%r1) + ld %f7,SC_FPRS+56(%r1) + ld %f8,SC_FPRS+64(%r1) + ld %f9,SC_FPRS+72(%r1) + ld %f10,SC_FPRS+80(%r1) + ld %f11,SC_FPRS+88(%r1) + ld %f12,SC_FPRS+96(%r1) + ld %f13,SC_FPRS+104(%r1) + ld %f14,SC_FPRS+112(%r1) + ld %f15,SC_FPRS+120(%r1) /* Don't touch %a0 and %a1, used for thread purposes. */ - lam %a2,%a15,SC_ACRS+8(%r5) + lam %a2,%a15,SC_ACRS+8(%r1) /* Load general purpose registers. */ - lmg %r0,%r15,SC_GPRS(%r5) + lmg %r0,%r15,SC_GPRS(%r1) /* Return. */ br %r14 |