diff options
| author | Andreas Schwab <aschwab@redhat.com> | 2009-06-24 11:36:57 -0700 |
|---|---|---|
| committer | Ulrich Drepper <drepper@redhat.com> | 2009-06-24 11:36:57 -0700 |
| commit | 3f241d758415e050269ebd9b3b909f3d007f89e5 (patch) | |
| tree | 698953028081d32e152816ce6de08f9a57b051de | |
| parent | 7a7c2c24654f7ab69b1cec72c329c8d73f0e4c04 (diff) | |
Fix cfa offset for saved registers in PPC sqrt implementations.
| -rw-r--r-- | ChangeLog | 8 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S | 4 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S | 4 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S | 4 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S | 4 |
5 files changed, 16 insertions, 8 deletions
@@ -1,3 +1,11 @@ +2009-06-24 Andreas Schwab <aschwab@redhat.com> + + * sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S: Fix cfa offset + for saved registers. + * sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S: Likewise. + * sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S: Likewise. + * sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S: Likewise. + 2009-06-23 Andreas Schwab <aschwab@redhat.com> * time/tzfile.c (__tzfile_read): Don't use an empty TZ string. diff --git a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S index 6aef4e301b..95a0b3915d 100644 --- a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S +++ b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S @@ -60,8 +60,8 @@ EALIGN (__sqrt, 5, 0) fmr fp12,fp2 stw r0,20(r1) stw r30,8(r1) - cfi_offset(lr,20) - cfi_offset(r30,8) + cfi_offset(lr,20-16) + cfi_offset(r30,8-16) #ifdef SHARED # ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 diff --git a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S index e5b8b9d565..c31555194b 100644 --- a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S +++ b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S @@ -60,8 +60,8 @@ EALIGN (__sqrtf, 5, 0) fmr fp12,fp2 stw r0,20(r1) stw r30,8(r1) - cfi_offset(lr,20) - cfi_offset(r30,8) + cfi_offset(lr,20-16) + cfi_offset(r30,8-16) #ifdef SHARED # ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 diff --git a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S index 925930bf77..105b5912a1 100644 --- a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S +++ b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S @@ -60,8 +60,8 @@ EALIGN (__sqrt, 5, 0) fmr fp12,fp2 stw r0,20(r1) stw r30,8(r1) - cfi_offset(lr,20) - cfi_offset(r30,8) + cfi_offset(lr,20-16) + cfi_offset(r30,8-16) #ifdef SHARED # ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 diff --git a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S index 891e69c9c0..14bc0a2ceb 100644 --- a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S +++ b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S @@ -60,8 +60,8 @@ EALIGN (__sqrtf, 5, 0) fmr fp12,fp2 stw r0,20(r1) stw r30,8(r1) - cfi_offset(lr,20) - cfi_offset(r30,8) + cfi_offset(lr,20-16) + cfi_offset(r30,8-16) #ifdef SHARED # ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 |